1. Field of the Invention
This invention relates to semiconductor memories and more particularly to MASK ROM memories and a method of manufacture thereof.
2. Description of Related Art
U.S. Pat. No. 5,308,777 of Hong for "An Improved Mask ROM Process" states as follows:
"This process with the nitride spacer . . . narrows the code implant opening further. However, the poly 2 deposit narrows the code implant to a degree approximating a sufficient amount. Accordingly, in that case, the nitride spacer . . . is optional."
In addition, the Hong U.S. Pat. No. 5,308,777 states as follows:
"The photoresist . . . is formed into a mask with an opening . . . above the channel . . . An ion implant . . . of boron B+ ions is implanted into the opening . . . The chemical species of the dopant implanted is boron with a dose between about 7.times.10.sup.13 /cm.sup.2 and about 2.times.10.sup.14 /cm.sup.2, at an energy of about 100 keV. At the end of the ion implantation, the resist is removed."
"By combining the nitride spacer . . . and the poly 2 structure . . . , a self aligned smaller ROM code opening is provided for implanting of boron. "
Commonly assigned U.S. patent application Ser. No. 08/289,649 of C. H. Hsu et al for "Surface Breakdown Reduction by Counter-doped Island in Power MOSFET", filed on Aug. 12, 1994 describes forming a power transistor through an etched opening in a FOX region.